Semiconductor Packaging

Semiconductor Packaging, C.O.B ( Chip On Board )

Semiconductor Packaging, C.O.B (Chip on Board)

We provide customized package services such as Flip Chip, CSP, BGA, etc. Package, Prototype Package, COB, etc. in cooperation with domestic and foreign OSAT companies.

Packaging process

Packaging Process

This is a necessary process to connect electrical signals between the PCB and the semiconductor, dissipate heat generated from the semiconductor, and protect against external shock and moisture impurities.

Packing process
Package Sample Assembly Capability

Package Sample Assembly Capability

LF Mold Type

QFN
QFN
  • 16 QFN(3X3mm)
  • 16 QFN(4X4mm)
  • 20 QFN(4X4mm)
  • 32 QFN(5X5mm)
  • 40 QFN(6X6mm)
  • 48 QFN(7X7mm)
  • 68 QFN(8X8mm)

Open Cavity Package

QFN LQFP DFN SOIC
QFN QFN QFN QFN
  • 16 QFN(3X3mm)
  • 20 QFN(4X4mm)
  • 24 QFN(4X4mm)
  • 32 QFN(5X5mm)
  • 40 QFN(6X6mm)
  • 48 QFN(7X7mm)
  • 56 QFN(8X8mm)
  • 64 QFN(9X9mm)
  • 88 QFN(10X10mm)
  • 100 QFN(12X12mm)
  • 48 LQFN(7X7mm)
  • 64 LQFN(10X10mm)
  • 8 DFN(3X3mm)
  • 10 DFN(3X3mm)
  • 8 SOIC (1.9X2.54mm)
  • 14 SOIC (1.9X2.54mm)
  • 16 SOIC (1.9X3.05mm)
  • 20 SOIC (3.81X5.58mm)
  • 24 SOIC (3.81X5.58mm)
  • 28 SOIC (4.0X5.8mm)

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Other Package

Ceramic CLCC PGA FPGA
QFN QFN QFN QFN
Supports all FPGAs that customers want

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Other Package

COB(CHIP ON BOARD)
QFN
Wire Bonder Capability K&S maxum ultra fine pad pitch up to 45um
MLPGA Package Substrate

MLPGA (Multi Land Plastic Grid Array) Package Substrate

MLPGA Substrate
QFN A versatile general purpose semiconductor package substrate designed to produce packages of various sizes, lead counts and shapes desired by customers using a single substrate.
Available package : Refer to page 10 ~ 13
Available package : Refer to page 10 ~ 13
  • ML-QFN /DFN ( 3X3 ~ 12X12mm )
  • ML-QFP ( 7X7 ~ 28X28mm )
  • ML-SOP ( 8 ~ 32Lead )
  • ML-SSOP ( 16 ~ 30Lead )
  • ML-TSSOP ( 8 ~ 64Lead )
  • ML-DIP ( 8 ~ 28Lead)
Information required when requesting packaging

Information required when requesting packaging

Wafer Die Package etc.
1) Wafer Size Diameter (mm)
2) Incoming Thickness (um)
3) Number of Dies
1) Die Size (width x height um)
2) PAD Size (width x height um)
3) Number of PADs (left, right, top, bottom)
4) Center distance between the nearest PADs (um)
5) Die PAD shape (inline & staggered mixed)
1) Package Type
2) Package Size (Width x Height mm)
3) BGA Ball Count
4) BGA Pitch & Ball Size (mm)
5) Solder Ball Material
1) Substrate layer count, thickness (mm)
2) Die PAD List & Ball Map
3) Bonding Wire material, thickness (mm)
4) Expected number of bonding wires
5) Number of sockets manufactured (Sockets for connection between evaluation board and chip)
6) Whether back grinding and sawing are performed
7) Laser marking details
8) Marking for confirming die location on wafer (whether pencil number marking is performed)

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example
Package Assembly Mass Production Support

Package Assembly Mass Production Support

  • Domestic Ass’y Site Support PKG: FBGA, PBGA, FC FBGA, LGA, QFP, WLCSP, Wafer Bumping (Gold, Solder, Cu Pillar)
  • Overseas Ass’y Site Support PKG: BGA, QFP, QFN, SOP, TSSOP, LGA, DIP, SOT, etc.
  • Wafer Back Grinding & SAW Outsourcing Support (6” 8” 12”Inch, MPW Wafer included)
  • Chip Sorting (GEL PACK or Waffle PACK) possible
Other Package Service

Other Package Services

  • Wire Bonding Diagram Spec Production
  • Package Substrate PCB Design & PCB Production
  • Laser Marking : Package New Marking & Remarking & Partial Marking
  • Test Socket Production
  • Wafer Probe Test, Final Test
  • T&R Packing In House Support
  • PKG Defect Analysis Support Service (X-RAY, DECAP, PHOTO, etc.)

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